Overview
- TSMC controls about 72% of the pure‑play foundry market, far ahead of Samsung at roughly 7%, according to industry data cited in the reports.
- The company began mass production of 2‑nanometer chips in late 2025 and expects the node to exceed 3‑nanometer from the start, with demand spanning smartphones and HPC/AI.
- Advanced technologies at 7‑nanometer and below generated about 74% of 2025 wafer revenue, including 3‑nanometer at 24%, 5‑nanometer at 36%, and 7‑nanometer at 14%.
- For 2025, revenue rose 35.9% year over year to $33.7 billion, HPC grew 48% to 58% of total sales, and management said AI accelerator revenue was a high‑teens percentage.
- High barriers to entry persist, with EUV tools costing nearly $500 million each, TSMC’s Arizona program expanding from an initial $12 billion to about $165 billion for three fabs, and Intel’s $100 billion Ohio complex now targeting first-plant completion in 2030.