Overview
- TSMC’s CoWoS advanced packaging capacity is sold out through 2027, and the company’s executives say limited assembly lines are constraining customer growth.
- Intel’s EMIB family, including EMIB-T, has won major design wins such as Google’s TPU orders and is reporting package yields near industry-leading levels while still working to raise substrate yields.
- TSMC has opened two response tracks: an internal “EMIB-like” project developed with substrate partner Kinsus and a panel-level Chip-on-Panel-on-Substrate (CoPoS) pilot that began in mid-2026 but is not expected to reach mass production until 2H 2028–2029.
- Customers are hedging by adopting multi-vendor packaging strategies that split high-bandwidth training chips on CoWoS and cost-sensitive ASICs or inference parts on EMIB-style solutions.
- The contest now turns on substrate suppliers, yield rates and factory ramps, and the outcome could reshape which foundries control long-term relationships with cloud providers and the timing of AI deployments.