Overview
- TSMC, at its North America Technology Symposium on Thursday, detailed a multi‑year plan through 2029 and said it will hold off on ASML’s pricier High‑NA extreme ultraviolet lithography machines through that period.
- A13 and A12, positioned as 1.3 nm and 1.2 nm class nodes, are targeted for 2029 with A13 delivering about 6% smaller area than A14 and A12 adding a backside “Super Power Rail” to feed power from the rear of the transistor layers.
- Within the 2 nm family, the N2U process is slated for 2028 and is described as a more mature option that lifts speed by roughly 3–4% or cuts power use by about 8–10% compared with N2P.
- TSMC plans larger advanced packaging, with CoWoS scaling to a 14‑reticle size in 2028 that can join about 10 compute dies with 20 high‑bandwidth memory stacks, plus A14‑to‑A14 SoIC 3D stacking in 2029 that raises die‑to‑die I/O density 1.8× and a 40‑reticle SoW‑X target in 2029.
- The company said its COUPE photonics engine will start true co‑packaged optics production in 2026, claiming about 2× better power efficiency and roughly 10× lower latency than pluggable optics on circuit boards.