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OpenAI’s Jalapeño Chip Claims Major Inference Efficiency and Latency Gains

OpenAI’s InferenceX benchmarks claim the Broadcom‑co‑developed ASIC delivers higher throughput, lower latency, better energy efficiency for interactive AI workloads.

Overview

  • OpenAI published its first Jalapeño silicon results on Tuesday, reporting 1.5–1.9× more AI work per watt and 1.7–3.6× lower end‑to‑end latency versus compared systems across three public models.
  • Jalapeño is a purpose‑built inference ASIC co‑developed with Broadcom and integrated with partners like Celestica, pairing a compute die with six HBM4 stacks and a 700 W package rating while OpenAI measured sustained test power at about 550 W.
  • OpenAI says it used its own models to speed design and verification, moving from RTL to tapeout in nine months and producing AI‑generated kernel implementations that it reports ran 1.5–1.8× faster than human‑written versions on selected blocks.
  • The company plans small‑volume Jalapeño deployments by the end of 2026 with larger ramping in 2027, but the published tests were run in OpenAI’s lab on SemiAnalysis’s InferenceX, did not include some newest Nvidia platforms, and face HBM memory and fab supply constraints for broader scale.
  • If production matches lab claims, Jalapeño could lower data‑center inference costs and speed interactive features for users, but OpenAI has not tied the chip to API price cuts or specific service guarantees and real customer effects hinge on independent verification and rollout pace.