Overview
- The High Performance Spaceflight Computing chip, which NASA detailed Tuesday, is in a JPL test campaign that started in February.
- Preliminary measurements indicate roughly 500 times the performance of today’s radiation-hardened processors, while NASA cites a design goal of up to 100 times current capability.
- The palm-sized system-on-a-chip folds CPUs, accelerators, networking, memory, and I/O into one unit with power-saving controls and the option to link multiple chips over advanced Ethernet.
- NASA and Microchip plan two versions to match mission needs, with a radiation-hardened model for deep space and long missions and a radiation-tolerant model for low Earth orbit and commercial uses.
- Ongoing radiation, thermal, shock, and landing-scenario tests will feed into certification, with the chip slated for future orbiters, rovers, crew habitats, and deep-space probes, and with adaptations expected for aviation and automotive on Earth.