Overview
- Kyoto University's team reported a junction field‑effect transistor (JFET) that operated up to 600°C, with the research paper published on 17 August 2026.
- The device uses industry-standard ion implantation and a bottom‑gate layout that captures implanted dopants, which tightened threshold‑voltage control to under 0.1 volt at 400°C compared with more than 2 volts in earlier top‑gate designs.
- A double‑well pn isolation replaces reliance on semi‑insulating SiC wafers and suppressed high‑temperature leakage to levels close to the theoretical floor set by SiC material properties.
- The transistor is depletion‑mode (normally‑on), so it draws standby power and cannot yet form low‑power complementary logic; the team says it will pursue normally‑off designs, wafer‑scale circuits, packaging, and long‑duration reliability tests.
- The result matters because SiC can survive far higher heat than silicon, and this work—together with prior long‑duration NASA Glenn SiC IC tests at lower temperatures—moves the field closer to electronics for gas turbines, deep drilling, and planetary probes.