Overview
- India will announce India Semiconductor Mission 2.0 within three months to scale the Design Linked Incentive and back at least 50 fabless firms, with the minister touting the long‑term goal of building global‑scale chip companies.
- Ashwini Vaishnaw set stretch manufacturing targets of 7‑nanometre by 2030 and 3‑nanometre by 2032 and said India aims to design and manufacture chips for 70–75% of domestic applications by 2029.
- Tata Electronics’ fab with Taiwan’s PSMC in Dholera targets 28nm initially with trial production around 2027, while Micron, CG Semi and Kaynes plan to start commercial packaging operations this year.
- Analysts warn that EUV tool access, yield maturation and specialist talent make the 3nm goal difficult, arguing for steady, node‑by‑node learning rather than leapfrogging.
- Ahead of Budget 2026, electronics executives seek deeper component‑linked incentives, duty rationalisation for capital machinery and skilling support, as the Economic Survey cautions India could remain a ‘service provider’ without assured semiconductor supply and stronger innovation.