Overview
- Huawei unveiled the Tau Scaling Law and the LogicFolding architecture at a Shanghai industry conference on Monday, May 25, saying the work grew from six years and 381 mass-produced designs.
- Tau Scaling shifts the focus from shrinking transistors to shortening signal and data travel time across chips and systems, which Huawei says can raise effective transistor density without advanced EUV lithography.
- LogicFolding stacks and folds logic layers to shorten internal wiring and will appear in Kirin phone processors in autumn 2026, with Huawei targeting Ascend AI processors by 2030 and 1.4nm-equivalent density by 2031.
- Huawei supplied no independent benchmarks and analysts point to unresolved engineering hurdles including heat dissipation, manufacturing yield, power efficiency, new EDA tools, and system-level integration that must be solved for the approach to scale.
- Investors cheered the announcement — SMIC shares rose — and if Huawei meets its targets the move could narrow China’s gap with Western vendors, reshape procurement for phones and data centers, and test the effectiveness of U.S. export controls.